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PAL810.LST
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1987-09-25
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3KB
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91 lines
PAL16R6
PAL FOR NSC810 TO PC BUS INTERFACE J.R. DRUMMOND 4/2/87
CONTROLS BUS ACCESS
CLK /BS /IOR /IOW RESET A4 A3 A2 A1 GND
/OC SELB ADENB ALE RDB WRB DATENB RES READY VCC
IF (VCC) /SELB = BS * /A4 * IOR + BS * /A3 * IOR
+ BS * A4 * A3 * /A2 * /A1 * IOR
+ BS * /A4 * IOW + BS * /A3 * IOW
+ BS * A4 * A3 * /A2 * /A1 * IOW
IF (/SELB) /READY = RDB * /WRB * /ALE + DATENB * /RDB * WRB * /ALE
+ DATENB * RDB * WRB * /SELB
/RES := /RESET
/ADENB := DATENB * RDB * WRB * ALE
+ ADENB * DATENB * RDB * WRB * /ALE
/ALE := /DATENB + /WRB + /RDB
+ /ADENB * DATENB * RDB * WRB * /SELB
/RDB := /ADENB * DATENB * RDB * WRB * /ALE * /SELB * IOR
+ /RDB * WRB * /ALE * /SELB * IOR
/WRB := /ADENB * DATENB * RDB * WRB * /ALE * /SELB * IOW
+ ADENB * DATENB * RDB * /WRB * /ALE * /SELB * IOW
/DATENB := RDB * /WRB * /ALE
+ /DATENB * RDB * WRB * /ALE * /SELB * IOW
+ /RDB * WRB * /ALE * /SELB * IOR
DESCRIPTION
------u------
CLK 1-| |-20 VCC
| |
/BS 2-| |-19 READY
| |
/IOR 3-| R|-18 RES
| |
/IOW 4-| R|-17 DATENB
| |
RESET 5-| R|-16 WRB
| 16R6 |
A4 6-| R|-15 RDB
| |
A3 7-| R|-14 ALE
| |
A2 8-| R|-13 ADENB
| |
A1 9-| |-12 SELB
| |
GND 10-|___________|-11 /OC
ADEN DATEN RD WR /ALE
+-> 1 0 0 0 0
| |
| | BS * IOW + BS * IOR
| |
| 1 0 0 0 1
| +-------------------------------+
| | |
| | BS.IOW | BS.IOR
| | |
| 0 0 0 1 1 0 0 1 0 1
| 0 1 0 1 1 |
| | |
| | |
| 0 1 0 0 1 <-+ BS * IOW 0 1 1 0 1 <-+ BS * IOR
| | | | |
| +---------+ +---------+
| | |
| +-------------------------------+
| |
| 0 0 0 0 1
| |
+--------------+
WRITE CYCLE READ CYCLE
READY ASSERTED AT LOOP POINT IN BOTH CYCLES AND BEYOND
ADDRESSES 00000 -> 11001 ARE DECODED